TSMC Shares More Info on 2nm: New MIM Capacitor and Backside PDN Detailed
by Anton Shilov on May 31, 2023 1:30 PM EST
TSMC has revealed some additional details about its upcoming N2 and N2P process technology at its European Technology Symposium 2023. Both production nodes are being developed with high-performance computing (HPC) in mind, so, they feature a number of enhancements designed specifically to improve performance. Meanwhile, given the performance-efficiency focus that most chips aim to improve upon, low-power applications will also take advantage of TSMC's N2 nodes as they will naturally improve performance-per-watt compared to predecessors.
"N2 is a great fit for the energy efficient computing paradigm that we are in today," said Yujun Li, TSMC's director of business development who is in charge of the foundry's High Performance Computing Business Division, at the company's European Technology Symposium 2023. "The speed and power advantages of N2 over N3 over the entire voltage supply ranges as shown is very consistent, making it suitable for both low-power and high-performance applications at the same time."
TSMC's N2 manufacturing node — the foundry's first production nodes to use nanosheet gate-all-around (GAAFET) transistors — promises to increase transistor performance by 10-15% at the same power and complexity, or lower power usage by 25-30% at the same clock speed and transistor count. Power delivery is one of the corner stones when it comes to improving transistor performance and TSMC's N2 and N2P manufacturing processes introduce several interconnects-related innovations to squeeze some additional performance. Furthermore, N2P brings in backside power rail to optimize power delivery and die area.
Fighting Resistance
One of the innovations that N2 brings to the table is super-high-performance metal-insulator-metal (SHPMIM) capacitor to enhance power supply stability and facilitate on-chip decoupling. TSMC says that the new SHPMIM capacitor offers over 2X higher capacity density compared to its super-high-density metal-insulator-metal (SHDMIM) capacitor introduced several years ago for HPC (which increased capacitance by 4X when compared to previous-generation HDMIM). The new SHPMIM also reduces Rs sheet resistance (Ohm/square) by 50% compared to SHDMIM as well as Rc via resistance by 50% compared to SHDMIM.
Yet another way to reduce resistance in the power delivery network has been to rearchitect the redistribution layer (RDL). Starting from its N2 process technology, TSMC will use a copper RDL instead of today's aluminum RDL. A copper RDL will provide a similar RDL pitch, but will reduce sheet resistance by 30% as well as cut down via resistance by 60%.
Both SHPMIM and Cu RDL are parts of TSMC's N2 technology that is projected to be used for high volume manufacturing (HVM) in the second half 2025 (presumably very late in 2025).
Decoupling Power and I/O Wiring
The use of a backside power delivery network (PDN) is a yet another major improvement that will be featured by N2P. General advantages of backside power rail are well known: by separating I/O and power wiring by moving power rails to the back, it is possible to make power wires thicker and therefore reduce via resistances in the back-end-of-line (BEOL), which promises to improve performance and cut down power consumption. Also, decoupling I/O and power wires allows to shrink logic area, which means lower costs.
At its Technology Symposium 2023 the company revealed that backside PDN of its N2P will enable 10% to 12% higher performance by reducing IR droop and improving signaling, as well as reducing the logic area by 10% to 15%. Now, of course, such advantages will be more obvious in high-performance CPUs and GPUs that have dense power delivery network and therefore moving it to the back makes a great sense for them.
Backside PDN is a part of TSMC's N2P fabrication technology that will enter HVM in late 2026 or early 2027.
Facebook
Twitter
RSS
15 Comments
View All Comments
Shaunathan - Wednesday, May 31, 2023 - link
Incredible thanks for the update Anton!del42sa - Thursday, June 1, 2023 - link
"TSMC's N2P fabrication technology that will enter HVM in late 2026 or early 2027"so they slow down while price skyrockets
Kevin G - Thursday, June 1, 2023 - link
The raw physics at this scale is hard and the slow down of new process nodes has generally been expected across the industry.The pricing side is more debatable as the factories to produce these chips is around $10 billion USD. That does need to be recovered by wafer sales. Could TSMC likely sell their capacity for less while remaining profitable? Likely as any good business with a high demand product/service always has a good margin. Could they charge that they did for previous process nodes and still make money? Not so much as fab costs have gone up tremendously. Beyond this is also developing newer process nodes which the R&D only gets more difficult and expensive.
back2future - Thursday, June 1, 2023 - link
[Few have answers to societies development (and their hardware needs) with saturated markets and reduced offerings for (cost reduced) upgrading or upcycling rewardings. Their concurrency on global markets is spendings for essential needs and every day living costs. If 'a science genius' could/would reduce production cost for new nodes it's probably distributed within all business hierarchies.]jjjag - Friday, June 2, 2023 - link
A semicondutor Fab of the most state-of-the-art technology has not been as low as $10B in many years now. 5/3nm Fabs cost at least $25B now, and looking ahead to 2nm and 1.4nm with more EUV layers, figure $30-40B in 10 years. Manufacturing $$ is increasing exponentially, and the ONLY way to mitigate that cost is to design smaller and smaller chips and use more advanced packaging techniques to build up an SOC. So all foundries are spending more and more on advanced packaging techniques to go along with the silicon technology itself.To reduce overall system/platform cost, you must increase the level of integration. CPU+chipset+NIC+GPU+FPGA on the SOC greatly reduces system cost (as it has been for the last 20 years), even though the individual pieces of silicon cost more than they did at the last node.
So foundries need to keep increasing their price to produce the individual pieces of silicon to absorb their increasing costs, but offer these advanced techniques to provide overall value at the system level.
shabby - Thursday, June 1, 2023 - link
Aaaaaand it's gone, apple bought all the capacity.back2future - Thursday, June 1, 2023 - link
["Apple's target audience consists of middle-class and upper-class users who can pay higher for products that provide them with an incredible user experience. This means that these users have a higher disposable income and are willing to pay more for as high-priced products as Apple's.""Apple customer demographics include people aged 18 to 45. They are either single, married with no kids, or married with young children or teens. The Apple target audience skews strongly female, with around 66% female to 34% male customers. Among Apple primary customers, you'll find less older or retired individuals."
"What is Apple's fastest growing business segment? Services was the fastest growing segment in 2022 with a 14% increase in revenue. Apple's Services segment has also been the fastest growing over a five year period."
"From September 2021‒2022, net iPhone sales contributed 52% of the company's total revenue, dwarfing revenue from other products including the Macbook, Apple Watch, Airpods, and services. Services (Apple Music, TV, iCloud etc.)"]
iphonebestgamephone - Thursday, June 1, 2023 - link
Why do you use chatgpt for every reply?back2future - Thursday, June 1, 2023 - link
[please define 1) chatgpt 2) every 3) reply; me thinks Apple does a lot of customer categorization for business, technology and brand value optimizations, these citations are examples of common available data summaries (from customers interactions probably), another would be "The typical Apple customer profile is of middle to high economic status, enjoys the small luxuries in life, and appreciates technology and design.", so mass market for energy efficiency impact is not that part of this market (for global high volume numbers of devices and networking bandwidth demand with high performance products, but given Apple devices are higher efficiency networking/media devices on client side]iphonebestgamephone - Thursday, June 1, 2023 - link
Huh its acrually really cool!